1. Field of the Invention
The present invention relates in general to the field of electronics, and more specifically to a power control system and method with voltage-based monitoring for over current protection.
2. Description of the Related Art
Power control systems often utilize one or more power conversion stages to convert alternating current (AC) voltages to direct current (DC) voltages or perform DC-to-DC conversions. For example, power control systems often contain a power factor correction (PFC) stage to provide power factor correction and regulate a link voltage, an output stage to provide output power to a load, and an isolation stage to isolate the PFC stage from the output stage.
The PFC stage and the output stage of a power control system have a one hundred percent (100%) rated power and a maximum power. The rated power refers to power available from the power control system under nominal operation conditions. The maximum power refers to a percentage of the rated power that can be supplied by the power control system for at least a limited period of time while maintaining a regulated output voltage and without damaging the power control systems and/or the load. Once the load begins demanding more power than the maximum power of the power control system, an output current of the output stage will increase, and an output voltage of the output stage will decrease. A controller that controls the power control system monitors the output current. When the output current exceeds a predetermined threshold, the controller will enter an over-current protection mode. However, circuitry used to sense the current can cause overall power losses and, thus, lower the efficiency of the power control system.
FIG. 1 depicts a power control system 100, and power control system 100 includes a PFC stage 102, an output stage 104, and an isolation stage 106 to isolate the PFC stage 102 from the output stage 104. Voltage source 108 supplies an alternating current (AC) input voltage VIN to a full bridge diode rectifier 110. Capacitor 112 provides high frequency filtering. The voltage source 108 is, for example, a public utility, and the AC voltage VIN is, for example, a 60 Hz/110 V line voltage in the United States of America or a 50 Hz/220 V line voltage in Europe. The rectifier 110 rectifies the input voltage VIN and supplies a rectified, time-varying, line input voltage VX to the PFC stage 102.
The power control system 100 includes a controller 114 to regulate a link voltage VLINK of PFC stage 102 and control isolation stage 106. Controller 114 generates a pulse-width modulated control signal CS0 to control power factor correction and regulate the link voltage VLINK of PFC stage 102. In one embodiment, PFC stage 102 is a boost-type, switching power converter, and control signal CS0 is a switch control signal that controls conversion of input voltage VX to link voltage VLINK. Controller 114 monitors voltages VX and VLINK to generate switch control signal CS0.
Isolation stage 106 isolates the PFC stage 102 from the output stage 104. Depending upon the type of PFC stage 102, the link voltage VLINK is either a multiple or a fraction of the input voltage VX. In either situation, the load 116 may not be compatible with the value of the link voltage VLINK or compatible with a DC voltage in general. Isolation stage 106 includes a transformer 118 to convert the link voltage VLINK into the output voltage VOUT. Transformer 118 is a flyback type transformer that includes switch 124. Control signal CSF controls the conductivity of switch 124 to convert link voltage VLINK into a time-varying, primary-side voltage VP to allow the primary-side windings 120 of transformer 118 to alternately store energy and then transfer energy to the secondary-side windings 122. In one embodiment, switch 124 is a field effect transistor (FET). Transformer 118 converts the primary side voltage VP into a secondary voltage VS. A variety of other topologies are well-known for isolation stage 106, such as half-bridge and full-bridge topologies as discussed in chapter 6 of Fundamentals of Power Electronics—Second Edition by Erickson and Maksimović, publisher Springer Science+Business Media, LLC, copyright 2001 (“Fundamentals of Power Electronics”).
The output stage 104 converts the secondary voltage VS into the output voltage VOUT. The topology of output stage 104 is a matter of design choice. Exemplary topologies are a half-bridge buck converter and a full-bridge buck converter. Examples of output stage 104 are also discussed in chapter 6 of Fundamentals of Power Electronics. 
Power control system 100 supplies load 116 with output voltage VOUT and output current iOUT. The load 116 is any device that can utilize the power provided by output stage 104. Controller 114 regulates the link voltage VLINK and the primary-side voltage VP to establish a particular value for the secondary-side load current iOUT. Controller 114 regulates the primary-side voltage VP by controlling the duty cycles of control signal CSF. Controller 114 obtains a value of the output current iOUT by sensing a feedback voltage VR—SENSE across sense resistor 126. The output current iOUT equals VR—SENSE/R, and R is the known resistance of sense resistor 126. Controller 114 regulates link voltage VLINK and the primary-side VP based on the value of output current iOUT. If the value of the output current iOUT is too large, controller 114 decreases the duty cycle of control signal CSF to reduce the value of output current iOUT. If the value of secondary side current iOUT is too small, controller 114 increases the duty cycle of control signal CSF to increase the value output current iOUT.
PFC stage 102 has a rated power of PRATED and a maximum power of PMAX. If load 116 demands more power than the maximum power PMAX, the output current iOUT increases and the output voltage VOUT decreases. If the output current iOUT exceeds a predetermined threshold value, the power control system 100 enters an over current protection mode. The particular over current protection mode involves, for example, turning the power control system 100 OFF to protect components of the power control system 100 from damage.
Power efficiency is generally a concern when designing and utilizing power control system 100. However, the voltage drop corresponding to the feedback voltage VR—SENSE across sense resistor 126 represents a power loss. Such power loss is disadvantageous.